The present invention relates to voltage sequencing and more particularly to a voltage sequencing arrangement for use with or in integrated circuits.
There are many instances in which a voltage sequencing arrangement is needed. Quite often, it is necessary for an integrated circuit or an electronic system to have two or more power supply voltages having different rising and falling edge delay requirements. That is, for example, an integrated circuit component may require a first power supply voltage and a second power supply voltage, the turn on of the second power supply voltage being delayed by a first time delay from the turn on of the first power supply voltage and the turn off of the second power supply voltage being delayed by a much shorter second time delay so as to be virtually simultaneous with that of the first power supply voltage.
One example of such a voltage sequencing requirement is that of a processor, such as a CPU (Central Processing Unit) integrated circuit. Many present-day processors are packaged so as to have the identical configuration and pin arrangement irrespective of their design voltage. That is, a processor designated for use in a laptop computer may use a lower power supply voltage than that of a processor designated for use in a desktop computer, even though the two processors are functionally identical in operation.
In order to avoid accidentally providing the wrong power supply voltage to such processors, many processors today are manufactured with VID (Voltage Identification) pins, typically four pins, which provide an output to a voltage regulator which supplies power to the processor. The VID output indicates to the voltage regulator what voltage is required by the processor. This ensures that the correct power supply voltage is automatically provided to the processor. However, upon initially providing a first power supply voltage to the processor, the VID output is unstable since it is in a transient state. Accordingly, it is necessary to provide a second voltage which is delayed from the first power supply voltage to the voltage regulator which indicates to the voltage regulator that the VID output is now stable and can be used to select the proper regulated power supply voltage supplied by the regulator to the processor. Furthermore, upon the first power supply voltage being turned off, the VID output is once again unstable since it is in a transient state and accordingly, it is necessary to turn off the second voltage without any additional delay so as to immediately have the voltage regulator turn off the regulated power supply voltage that it is supplying to the processor.